This invention relates to an electric circuit for use in an A/D converter, more particularly to an interpolation circuit having a first and a second pair of inputs and at least three pairs of outputs, each pair of inputs serving to receive two input signals which are substantially complementary to one another, each of at least two pairs of outputs supply two substantially complementary output signals. The first pair of outputs is connected to the first pair of inputs and the second pair of outputs is connected to the second pair of inputs. A first output of the third pair of outputs is connected to a node in the circuit which is not one of the inputs of the first pair of inputs. Such a circuit is known from the published European Patent Application no. 227,165 (PHA 1137), a copy of which is on file in this application, and is hereby incorporated by reference. This circuit is used, for example, as an interpolation circuit in analog-to-digital (A/D) converters. Important considerations in developing an A/D converter or the conversion speed, the dissipation, which are directly related to the number of components in the A/D converter, and the resolution.
So-called "flash" converters provide the highest conversion speed. In a fully parallel version of such a converter the input voltage is applied to 2.sup.n -1 comparators, each of which compare this voltage with one of 2.sup.n -1 reference values to generate an n-bit digital signal, see for example, J. Peterson, "A monolithic video A/D converter", IEEE JSSC, Dec. 1979, pp. 932-937.
The principal disadvantage of this fully parallel version is the large number of components needed which is due to, inter alia, the large number of comparators required.
Many proposals have been made to reduce the number of comparators in an A/D converter, see for example, U.S. Pat. Nos. 4,270,118 and 4,386,339. Generally these proposals lead to a reduction in conversion speed.
A "folding" system is one of the more promising techniques for reducing the number of components. In a "folding" A/D converter a number of "folding" amplifiers respond to an input voltage and a corresponding number of reference voltages in such a way that each amplifier generates two substantially complementary signals, each of which has a recurring trapezoidal shape as a function of the input voltage level.
European Patent Application no. 227,165 describes an improvement to an A/D converter equipped with folding amplifiers and proposes an interpolation system which interpolates between at least two pairs of said complementary signals which vary with a parameter to generate further pairs of complementary signals representing said parameter.
An input circuit generates at least two pairs of substantially complementary signals. In general these signals are generated in response to an analog input voltage in such a way that the voltages of at least one of the signal pairs vary in a non-insubstantial manner as a function of the input voltage for each value of the input voltage as this voltage varies over a certain input voltage range.
Interpolation is performed with an interpolation circuit comprising two strings each comprising a specific number of series-connected impedance elements, preferably resistors, arranged between two pairs of inputs. To each pair of inputs an associated pair of complementary input signals is applied. Pairs of modes between two consecutive impedance elements in the two strings, which are moreover located at similar positions along the strings, constitute outputs from which pairs of complementary interpolated signals can be taken. Moreover, the two pairs of complementary input signals also constitute two pairs of output signals of the interpolation circuit.
Sampling comparators (sample latches), corresponding in number to the number of pairs of output signals, generate a sequence of digital bits by comparing the voltages of each pair of output signals.
Only the "zero crossings"--that is the signs of the voltage differences--are material. For the rest the magnitude of the signal difference is irrelevant. The result of the steps proposed in said European Application is a reduction of the number of components without a loss of conversion speed or accuracy.